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Shift-Right Finite State Machine(FSM) |
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FSMs are the algorithms for hardware devices. They explain the work flow of the devices. Also FSMs are easy to implement in hardware. One example FSM can be a shift-right FSM. Once it’s developed, by infinite bitstream it can work forever.
Right-Shift by 2 The design steps of this FSM is shown in Table 1. Output bit is chosen by first bits of “Present State”. To determine “Next State” second bit of “Present State” and bit of “Input Bit” are taken side by side. Figure 1. shows the appropriate FSM for Table 1. Table 1. Design table for Right-Shift by 2 FSM Present State | Input Bit | Next State | Output Bit | 00 | 0 | 00 | 0 | 00 | 1 | 01 | 0 | 01 | 0 | 10 | 0 | 01 | 1 | 11 | 0 | 10 | 0 | 00 | 1 | 10 | 1 | 01 | 1 | 11 | 0 | 10 | 1 | 11 | 1 | 11 | 1 |
Figure 1. The FSM of Right-Shift by 2
Right-Shift by 3 Design table, for Right-Shift by 3 FSM, can be seen in Table 2. and Figure 2 shows the FSM of Right-Shift by 3 FSM.
Table 2. Design table for Right-Shift by 3 FSM Present State | Input Bit | Next State | Output Bit | 000 | 0 | 000 | 0 | 000 | 1 | 0001 | 0 | 001 | 0 | 010 | 0 | 001 | 1 | 011 | 0 | 010 | 0 | 100 | 0 | 010 | 1 | 101 | 0 | 011 | 0 | 110 | 0 | 011 | 1 | 111 | 0 | 100 | 0 | 000 | 1 | 100 | 1 | 001 | 1 | 101 | 0 | 010 | 1 | 101 | 1 | 011 | 1 | 110 | 0 | 100 | 1 | 110 | 1 | 101 | 1 | 111 | 0 | 110 | 1 | 111 | 1 | 111 | 1 |
Figure 2. The FSM of Right-Shift by 3
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